The green laser beam of laser pointer is visible and clear in the darkness.
However, the calculation of the duty cycle is calculated, so the positive logic PWM logic of the procedure will reverse once. AD sampling interrupt is generated by the DSP hardware, after the When DSP completion of one AD sample, will produce an AD sampling interrupt. The program responds to the interruption, into the AD sample the ISR. In the AD sample IR, made 12 AD sample value. Sampled values into digital controller program to calculate the PWM duty cycle of the next cycle, and then update EVA_TIMER1 compare register. Finally reset the AD converter to complete the interrupt acknowledge []. Digital controller design is the difficulty of the entire software system. The controller is good or bad, is directly related to overall system performance. The customer can use the green laser beam of laser pointer to observe or show the star.
Digital controller design the most difficult is precisely the transfer function. First in a changing input voltage; Second, the internal resistance of the load is non-linear changes; Finally, the output filter inductor inductance decreases with increasing current. By the relationship between current and inductance, ferrite core 10A in the inductance decreased by 20%. Inductance change, a direct impact on the system transfer function.
Krypton lamp dynamic impedance R = 3Ω about. As a result of the average current control method, the actual control is the average inductor current. Inductor current and duty cycle of the transfer function onto the process is as follows, using state space averaging method to establish a system of small-signal model, and its strike Laplace's transform. The whole system open loop transfer function: The above analysis assumes that the system is a continuous system, while the actual system is a discrete sampling system, need to take into account the sample and hold time and control delay time. Sample and hold time the main aspects of the decision of the AD converter link and PWM output to control the delay time is determined by the software architecture adopted.
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